Google TPU 8tx and 8i Max explained — one adds confidential computing to the 8t, the other packs two 8i chips together

Google added two systems to its eighth-generation TPU family on November 9, 2026 (US time): TPU 8tx and TPU 8i Max. They follow the TPU 8t (training) and TPU 8i (inference) introduced at Google Cloud Next in April. Amin Vahdat, Google's chief technologist for AI and infrastructure, wrote that it is the first time the company has introduced four TPU systems in a single year.

Neither is a new chip. The 8tx is 8t silicon paired with security-capable hosts; the 8i Max is two 8i chips in one package. Google is recombining existing silicon to reach two distinct markets: regulated industries, and workloads with enormous context windows. It says nearly 100 customers now use TPUs, including frontier labs, trading firms, retailers and universities, without naming any.

1. The four eighth-generation TPUs at a glance

Every figure here is Google's own. No independent benchmarks exist yet.

The naming is simple: t for training, i for inference. The 8tx is a variant of the 8t, but despite the name it is not a large-scale training system. Google positions it for secure, confidential inference and small-scale training — a hybrid that uses training silicon with the inference chip's network.

2. TPU 8tx — what confidential computing is and why AI chips need it

Data exists in three states: stored, in transit, and in use. Encryption for the first two is routine. The third is the weak point, because data has to be decrypted in memory before a processor can compute on it.

Confidential computing closes that third gap in hardware. The processor carves out an encrypted, isolated region of memory and only decrypts data inside it, so that even the cloud provider's administrators and system software cannot inspect it. Google says the 8tx keeps "data and model weights" isolated while in use.

On CPUs this is not new; confidential virtual machines built on AMD's Secure Encrypted Virtualization (SEV) have been sold by cloud providers for years. The hole was the accelerator. In AI workloads, data leaves CPU memory and is processed on a GPU or TPU, so isolating the CPU alone leaves the actual computation exposed. According to eWeek's account of AMD's November 9 announcement, SEV on the 5th Gen EPYC host extends protection from the host CPU to connected accelerators and verifies each accelerator's identity and security configuration in hardware. ServeTheHome reports the hosts are dual-socket EPYC "Turin" processors.

The buyers are organizations that cannot put sensitive data on shared AI hardware otherwise: banks, hospitals and governments, plus companies protecting proprietary model weights. Google lists private fine-tuning, distillation and reinforcement learning for agents as uses.

The "2x" claim is about latency, not speed

Coverage has rendered the 8tx performance claim in different directions.

Google's text says "up to 2x lower latency compared to TPU 8t." Latency is the wait for a response; throughput is the total work done per unit of time. Halving latency does not mean doubling throughput, so "twice as fast" reads more into the claim than Google wrote. The baseline is also the 8t in the same generation, not an older TPU.

The gain does not come from the security features either. Google attributes it to the Boardfly network borrowed from the 8i. ServeTheHome notes Boardfly has a maximum hop diameter of 7, against 16 for the training torus. Google has not said which workload was measured or given absolute numbers, and the "near-zero performance penalty" for security is likewise its own description.

3. TPU 8i Max — two chips, double the HBM bandwidth

The 8i Max puts two TPU 8i chips on a single package. Google says it delivers double the compute, double the SRAM and double the HBM bandwidth of the 8i, and fits twice the silicon in the existing rack footprint.

The target is the "memory wall." When many agents read a large codebase at once, or a model works through long video, the bottleneck is less raw compute than how fast data can be pulled from memory — bandwidth. HBM, or high-bandwidth memory, is the stacked DRAM that sits beside AI chips for this purpose.

One detail stands out: if ServeTheHome's figure is right, bandwidth doubles while capacity rises only about a third. Bandwidth is how much data moves per second; capacity is how much can be held. The 384 GB number comes from a single outlet and is not in Google's post, so treat it as provisional.

What it means for memory makers — confirmed versus speculation

HBM is made by three companies: South Korea's SK hynix and Samsung Electronics, and Micron of the United States. The Korean pair's HBM sales are closely watched because memory chips are a major share of the country's exports.

With no supplier named, there is no basis for calling the launch a win for any particular memory maker.

4. Market reaction and what is still unknown

Bloomberg framed the launch as Google escalating its rivalry with Nvidia. Bloomberg Intelligence, as cited by Invezz, estimates TPU sales could exceed $135 billion in 2028, from about $12 billion in 2026.

The Alphabet figures differ by time of report. Nvidia's fall cannot be pinned on the TPU news alone: reports of an independent board investigation involving its chief executive landed the same day.

Still undisclosed:

FAQ

Is the TPU 8tx a new chip? No. Google says it uses the same silicon as the TPU 8t, with AMD EPYC hosts, confidential computing and the Boardfly network added.

Is the TPU 8i Max twice as fast as the 8i? Google says it has twice the compute, SRAM and HBM bandwidth — twice the resources. It has not published measured workload speedups.

Does confidential computing mean the cloud provider cannot see my data? That is the design goal. Whether it holds depends on attestation and outside verification, which have not been published for the 8tx.

Our explainers on custom AI chips (ASICs), on AI inference chips and on HBM cover why Google builds its own silicon, why training and inference chips diverge, and why memory bandwidth is the bottleneck.