IBM Nighthawk r3 — 520 qubits and 10,000 operations are targets; the working chip is the 120-qubit r2
IBM Nighthawk r3 is a next-generation quantum processor that IBM announced on November 11, 2026 (US Eastern time). It is designed to run 10,000 quantum operations accurately on 520 programmable qubits, the ones users compute with, and counts 2,034 physical qubits once supporting elements are included. It adds 10 chip-to-chip links called l-couplers, and IBM plans to join two r3 chips into a 1,040-qubit system in 2027. These are design targets, not measurements. The chip available now is Nighthawk r2, with 120 qubits and more than 7,500 operations, and no release date was given for r3. The qubits are not error-corrected, so the chip is far from anything that could break encryption.
The three lines
- Specs — 520 programmable qubits, 2,034 physical qubits, 10,000 operations, 10 l-couplers; all design targets, no release date
- As of November 11, 2026 — the usable chip is r2: 120 qubits, 7,500+ operations, up to 100,000 samples per second; chip-to-chip transfer is at 99.3% against a 99.9% goal
- Distance — quantum advantage was claimed in three July 2026 papers and is still being checked; RSA-2048 estimates assume error correction and 20,000 to 1 million qubits
Key questions
- IBM Nighthawk r3 specs
- **Designed to run 10,000 quantum operations on 520 programmable qubits. These are targets rather than measurements, and no release date has been given.** | Item | Nighthawk r3 (per IBM) | |---|---| | Programmable qubits | 520 | | Physical qubits, including supporting elements | 2,034 | | Quantum operations | 10,000 (design target) | | Layout | Square lattice, as in r2 | | Chip-to-chip links (l-couplers) | 10 | | 2027 plan | Two r3 chips linked into a 1,040-qubit system | | Release date | Not stated |
- Nighthawk r1 vs r2 vs r3
- **r2 kept the qubit count of r1 and raised speed; r3 raises the qubit count from 120 to 520 and adds links between chips.** | | r1 | r2 | r3 | |---|---|---|---| | Announced | Nov 12, 2025 | Aug 31, 2026 | Nov 11, 2026 | | Programmable qubits | 120 | 120 | 520 | | Operations (two-qubit gates) | Up to 5,000 | More than 7,500 | 10,000 (target) | | What was new | Square lattice, 218 couplers | A reset element per qubit, up to 100,000 samples per second | 10 l-couplers | | Status | Released | Available | Design stage |
- has IBM achieved quantum advantage
- **IBM and partners published three papers in July 2026 reporting demonstrations of quantum advantage. Independent checking is still under way, and the experiments first ran on the older Heron chip, not on r3.** | Experiment | Who | Scale | How it was checked | |---|---|---|---| | Doped Clifford sampling | UChicago and IBM | 70 logical qubits | Anchored to a classically simulable reference circuit | | Floquet dynamics | Qedma, with RIKEN and BlueQubit | Up to 74 qubits | Two error-mitigation estimators agreed; partly repeated on another vendor's machine | | Operator Loschmidt echo | Algorithmiq | 56 qubits | Consistent across several devices; classical methods disagreed with each other |
On November 11, 2026 (US Eastern time), IBM announced Quantum Nighthawk r3, its next quantum processor. The headline figures are 520 qubits and 10,000 quantum operations, and IBM says it will link two of the chips into a 1,040-qubit system in 2027.
Two things need separating before those numbers mean anything. First, the r3 specification is a design target, not a measurement: the release describes a chip that "will be built," and gives no release date. The processor users can actually run today is Nighthawk r2, a 120-qubit chip introduced on August 31, 2026. Second, r3's qubits are not error-corrected, which puts it in a different class from the machine that could one day threaten encryption.
1. What was announced — 520, 2,034, 10,000 and 10
| Number | Meaning | Status |
|---|---|---|
| 520 | Programmable qubits: the ones users address in an algorithm | Design target |
| 2,034 | Total physical qubits: the 520 plus supporting elements | Design target |
| 10,000 | Quantum operations the chip should execute accurately | Design target |
| 10 | Chip-to-chip links, called l-couplers | Design target |
The gap between 520 and 2,034 comes from how IBM counts. In a July 16, 2026 post on metrics, IBM split qubits into two kinds. Programmable qubits are those users directly control. Physical qubits are every quantum element on the chip, including the couplers that connect qubits and the gadgets that reset them, since couplers are built from the same transmon circuits as the qubits. IBM argues the programmable count is the more useful measure of scale.
Nighthawk r2 shows the arithmetic: 120 programmable qubits, 218 couplers and 120 reset elements make 458 physical elements. For r3 IBM gives 520 and 2,034 but no breakdown. So the number to set beside other vendors' qubit counts is 520, and the 1,040 planned for 2027 is likewise a programmable count (520 × 2).
The layout is the square lattice of r2, in which most qubits connect to four neighbors rather than the two or three of IBM's earlier Heron chips. More connections let the same computation be written with fewer operations. What is new is the 10 l-couplers that let one chip talk to another.
The release went out at 7:00 a.m. Eastern from Yorktown Heights, New York, alongside an IBM blog post on its Quantum Developer Conference. Jay Gambetta, director of IBM Research, said in it that useful quantum computing depends on delivering results with both accuracy and speed. The release's own headline is about speed and quality, not qubit count.
2. How r1, r2 and r3 differ
| Nighthawk r1 | Nighthawk r2 | Nighthawk r3 | |
|---|---|---|---|
| Announced | November 12, 2025 | August 31, 2026 | November 11, 2026 |
| Programmable qubits | 120 | 120 | 520 |
| Physical elements | 120 qubits + 218 couplers | 458 (120 qubits, 218 couplers, 120 reset elements) | 2,034 (no breakdown) |
| Operations | Up to 5,000 two-qubit gates | More than 7,500 | 10,000 (target) |
| Speed | — | Up to 100,000 samples per second, about 25x Heron | Not stated |
| Main change | Square lattice; circuits 30% more complex than Heron | A reset element per qubit; idle time cut from hundreds of microseconds to about one | Over four times the qubits; 10 l-couplers |
| Status | Released | Available on IBM Quantum Platform (ibm_phoenix) | Design stage, no date |
From r1 to r2, the change was speed. A quantum computer runs the same circuit over and over and builds its answer from the collected results, called samples. Between runs the qubits must be emptied. Heron needed hundreds of microseconds of waiting for that; r2 gives each qubit a dedicated reset element and, IBM says, cuts the wait to as little as a microsecond. The result is up to 100,000 samples per second against roughly 4,000 on Heron.
IBM also published usage figures: clients and partners have run 34 billion circuits on r2 and report speedups of up to 19x over earlier IBM processors.
| Case (per IBM) | Result | Compared with |
|---|---|---|
| E.ON, the German energy company | 15x faster quantum machine learning for grid optimization | Earlier work on Heron |
| Oak Ridge National Laboratory | 12x faster magnetic-materials simulation, consistent with neutron scattering data | Heron |
| Algorithmiq | About 8x faster simulation of a heterogeneous quantum material | Original Heron experiment |
| Extended circuits from that experiment | Leading classical tensor-network methods would need an estimated 240x more memory | Classical computing |
These are comparisons between IBM quantum chips, not against classical computers. Only the 240x figure concerns classical methods, and it is an estimate of memory, not a measured speed. All are reported by IBM and its partners.
From r2 to r3, the change is scale: more than four times the qubits, a higher operation target, and links that leave the chip.
Set against IBM's roadmap, the picture is mixed. In November 2025 IBM projected up to 7,500 gates by the end of 2026, 10,000 in 2027 and 15,000 by 2028 with more than 1,000 qubits. The 7,500 mark arrived a few months early with r2. The 10,000 mark is on schedule for 2027. The 1,000-qubit mark has moved up: a June 2025 plan reached 1,080 qubits in 2028 by joining nine modules, whereas the new plan reaches 1,040 in 2027 with two larger chips.
3. Why operations matter more than qubits
A qubit is the unit of quantum computation, able to hold a blend of 0 and 1, and that state is fragile. Every time two qubits are entangled in a two-qubit gate there is a small chance of error, and the errors accumulate.
A hypothetical shows the scale. At an error rate of 0.1% per gate, the chance of getting through 10,000 gates without a single error is 0.999 multiplied by itself 10,000 times, or about 0.005%. That is arithmetic to illustrate the principle, not an IBM figure: IBM describes r2's gate fidelity only as Heron-class and gives no error rate for r3. But the logic holds for any machine. However many qubits a chip has, it cannot run a long computation if errors swamp it after a short one.
That is why IBM's July 2026 post proposes three measures.
| Measure | What it counts | r2 | r3 (target) |
|---|---|---|---|
| Scale | Programmable qubits | 120 | 520 |
| Quality | Two-qubit operations that can be executed reliably | More than 7,500 | 10,000 |
| Speed | Circuits, or samples, per second | Up to 100,000 | Not stated |
"Accurately" does not mean error-free. Today's machines rely on error mitigation: collecting a very large number of noisy samples and statistically removing the effect of the noise. IBM's r2 post describes running 7,500-gate circuits with such a technique. Mitigation is hungry for samples; IBM says applications using thousands of operations on a hundred or more qubits need millions to billions of them. Hence the weight on speed.
Mitigation is not error correction, in which many physical qubits are bundled into one logical qubit that repairs its own errors. Nighthawk chips use physical qubits directly. That distinction decides the encryption question below.
Linking chips — 4, then 10, then more than 100
The 1,040-qubit system exists only if two chips can be joined. In an experiment IBM published on October 27, 2026, the link was an 80-centimeter aluminum coaxial cable.
| Item | Per IBM |
|---|---|
| Setup | Two Nighthawk r1 chips in one dilution refrigerator, joined by 4 l-couplers |
| Quantum state transfer fidelity | 99% average, 99.3% best |
| IBM's stated target | 99.9% |
| Two-qubit gate fidelity across chips | 94.75%, averaged over the four links |
| L-couplers on r3 | 10 |
| L-couplers needed for Starling in 2029 | More than 100 |
The number to watch is 94.75%. Gates that cross between chips are still well below gates inside a chip, and a linked 1,040-qubit system is only worth more than two separate 520-qubit chips if that figure rises. IBM lists yield, reproducibility and error rates of the couplers as work remaining. On the cooling side, it says it joined two cryogenic modules into one system for the first time, reaching operating temperature in under five days and below 15 millikelvin.
4. Has quantum advantage been achieved?
Quantum advantage means a quantum computer doing a calculation that classical methods alone cannot. The fair summary is: claimed, and under review.
| Date | What happened |
|---|---|
| November 12, 2025 | IBM says it expects the first community-verified advantage by the end of 2026; an open Quantum Advantage Tracker is run with Algorithmiq, the Flatiron Institute and BlueQubit |
| July 30, 2026 | UChicago, Qedma and Algorithmiq, working with IBM, release three papers reporting demonstrations of advantage |
| November 11, 2026 | IBM says the July experiments first ran on Heron and that circuits and results are open for independent testing on the tracker |
The experiments involve 70 logical qubits, up to 74 qubits and 56 qubits. Their shared argument is that leading classical methods failed to reproduce the quantum results and, in the hardest regimes, disagreed with one another.
The limits are stated in the source. The July post says that announcing an advantage opens the result to more scrutiny rather than closing the case, and expects the exchange with classical benchmarking to continue. Two of the three experiments are validated through error-mitigation models rather than a known classical answer, and one depends on an accurate model of device noise.
Nighthawk r3 played no part in any of this, because it has not been built. The experiments began on Heron; r2 has rerun one of them faster and on larger circuits. And the advantage claimed is for specific physics simulations, not for everyday workloads or for breaking codes.
5. Against Google Willow and Quantinuum Helios
| IBM Nighthawk r2 / r3 | Google Willow | Quantinuum Helios | |
|---|---|---|---|
| Announced | August 2026 / November 2026 | December 9, 2024 | November 2025 |
| Qubit type | Superconducting | Superconducting | Trapped ion (barium) |
| Qubits | 120 / 520 (target) | 105 | 98 |
| Connectivity | Square lattice, four neighbors | — | All-to-all |
| Headline metric | 7,500+ operations, up to 100,000 samples per second / 10,000 operations (target) | Errors halve each time the error-corrected array grows | Two-qubit gate fidelity of 99.921% |
| Signature claim | Three advantage papers with partners, under review | A random circuit sampling task in under five minutes that would take a supercomputer 10^25 years | 48 error-corrected logical qubits |
| Source of figures | IBM | Quantinuum |
Each figure is the vendor's own, as of its announcement; later updates to Willow and Helios were not checked. Direct comparison fails for three reasons. Qubit counts do not mean the same thing: Helios has fewer qubits but connects every pair and publishes its gate fidelity, while IBM has not published gate error rates for r2 or r3. Speeds differ: superconducting qubits are fast, trapped ions slower but more accurate, and IBM's emphasis on samples per second plays to its own strength. And the goals differ: Willow's announcement was about error correction improving with scale, while Nighthawk is a chip for finding useful work without error correction.
IBM runs a separate line for that.
| Year | Without error correction (Nighthawk) | Error-correction line | Basis |
|---|---|---|---|
| 2025 | r1: 120 qubits, 5,000 gates | Loon: experimental chip testing fault-tolerance components | IBM, November 2025 |
| 2026 | r2: 120 qubits, 7,500+; r3 announced | Kookaburra: first module combining quantum memory and logic (plan) | IBM roadmap, June 2025; 2026 releases |
| 2027 | Two linked r3 chips, 1,040 qubits, 10,000 operations | Cockatoo: entanglement between modules (plan) | Same |
| 2028 | 15,000 gates (2025 plan) | 100 logical qubits running 100,000 hard operations by late 2028, a goal under the US Energy Department's Genesis Mission | IBM, November 2025; QDC 2026 post |
| 2029 | — | Starling: 200 logical qubits, 100 million gates, in Poughkeepsie, New York | IBM roadmap, June 2025 |
Kookaburra and Cockatoo do not appear by name in the November 2026 materials, so their status is unconfirmed. IBM does say Loon now combines the parts of an error-correcting processor on one chip, with performance comparable to r2. The gap between the two lines is plain in the operation counts: 10,000 for r3, 100 million for Starling. A factor of 10,000 is not closed by refining a chip; it requires a different method.
6. How far from breaking encryption?
RSA, the public-key system under much of internet security, falls to a large quantum computer running Shor's algorithm. Estimates of "large" have dropped.
| Estimate | Date | Qubits needed | Runtime | Assumes |
|---|---|---|---|---|
| Gidney and Ekerå | 2019 | About 20 million | About 8 hours | 0.1% gate error, surface-code error correction |
| Gidney (Google) | May 2025 | Under 1 million | Under a week | Same hardware assumptions as 2019 |
| Alice & Bob | October 2026 | 22,593 | 3.14 days | Cat qubits, a different kind of qubit, with a tailored code |
A fall from 20 million to about 20,000 can make 520, or 1,040, look close. It is not.
- Different kind of machine. Every estimate assumes working error correction. Nighthawk r3 has none, and a chip limited to 10,000 operations cannot finish the long computation Shor's algorithm requires.
- Far even by raw count. Against Gidney's sub-million figure, 520 is about one two-thousandth.
- The lowest estimate is for hardware that does not exist. The Alice & Bob number is a theoretical projection in a preprint, and coverage of it notes substantial engineering challenges ahead.
- IBM's own fault-tolerant target is smaller. Starling aims for 200 logical qubits and 100 million gates in 2029. Nothing in the IBM materials we reviewed says Starling would factor RSA-2048.
None of this is a reason to wait. The estimates have fallen from 20 million to the low tens of thousands in seven years while hardware climbs from the other side, and encrypted data can be harvested now and decrypted later. That is why the US National Institute of Standards and Technology has set quantum-vulnerable public-key algorithms to be deprecated after 2030 and disallowed after 2035. The IBM release itself does not mention encryption or RSA at all.
7. What remains open
- Measured r3 performance. Whether 520 qubits deliver 10,000 operations will be known only when the chip exists. Gate error rates, speed and a release date are all missing, as is the breakdown of the 2,034 physical qubits.
- Link quality. State transfer at 99.3% at best and cross-chip gates at 94.75% are short of target; the fidelity two r3 chips achieve in 2027 will decide what the 1,040-qubit system is worth.
- Independent verdicts on advantage. The release does not say how classical challenges to the July papers have fared. IBM's own deadline, set in 2025, is the end of 2026.
- The error-correction line. Kookaburra's status is unconfirmed, and Starling needs more than 100 l-couplers.
- Competitors' current numbers. Willow and Helios are compared here only as announced.
For encryption, the nearer risks are old keys and flawed implementations rather than quantum hardware. Our earlier pieces "DeepMind AI agents find two RSA-1024 weaknesses" and "What is post-quantum cryptography?" cover that ground and the migration deadlines, and our same-day explainer "What is a qubit" covers the basics this article passes over.
Sources
- IBM Newsroom — IBM Quantum Nighthawk Demonstrates New Levels of Speed and Quality, with Plans to Scale Beyond 1,000 Qubits in 2027 (2026-11-11)
- IBM Quantum Blog — QDC 2026 (2026-11-11)
- IBM Quantum Blog — Nighthawk r2 (2026-08-31)
- IBM Quantum Blog — How to measure the performance of a quantum computer (2026-07-16)
- IBM Quantum Blog — Connecting quantum processors with l-couplers (2026-10-27)
- IBM Quantum Blog — Quantum advantage (2026-07-30)
- IBM Quantum Blog — IBM lays out clear path to fault-tolerant quantum computing (2025-06-10)
- IBM Newsroom — IBM Delivers New Quantum Processors, Software, and Algorithm Breakthroughs on Path to Advantage and Fault Tolerance (2025-11-12)
- The Quantum Insider — IBM Plans 1,040-Qubit Quantum System with Next-Generation Nighthawk Processors (2026-11-11)
- Techzine — IBM Nighthawk r3 processor can handle 10,000 quantum operations (2026-11-11)
- The Next Web — IBM plans to link two quantum chips into a 1,040-qubit system in 2027 (2026-11-11)
- Google — Meet Willow, our state-of-the-art quantum chip (2024-12-09)
- The Quantum Insider — Illuminating Helios: Quantinuum's Shiny New Quantum Computer Gets Sunny Reception (2025-11-06)
- arXiv — Craig Gidney, How to factor 2048 bit RSA integers with less than a million noisy qubits (2025-05-21)
- The Quantum Insider — Alice & Bob Estimates 22,593 Qubits to Break RSA-2048 (2026-10-29)